The present invention is directed to an in-line test circuit and method for determining interconnect electrical properties and an integrated circuit (IC) incorporating the same.
ICs, which form a vital part of a vast array of modern electronic equipment, have become steadily but dramatically smaller, faster, more sophisticated and more power-efficient. However, as ICs have shrunk in size and voltage and grown in speed, the electrical properties (e.g., capacitance or resistance) of the metal or polysilicon conductors (“interconnects”) used within the ICs have become material to proper performance.
An IC is fabricated by forming devices in or on a single substrate, often composed of silicon. The result is one or more “device layers.” Then, interconnects are formed to integrate the devices together into one or more electrical circuits. Often, the interconnects are arranged in multiple layers (“interconnect layers”) that overlie the devices. A sophisticated IC, such as a digital signal processor (“DSP”) may have ten or more interconnect layers overlying its devices.
Those skilled in the art of IC fabrication understand that the processes used to form the interconnect layers often produce variations in interconnect cross-section from one layer to the next and from one IC to the next that result in varying electrical properties. The electrical properties may vary to such a degree that the IC does not function properly. Thus, it is highly desirable to ensure that the interconnect fabrication processes are producing interconnects of acceptable cross-section in each layer.
Unfortunately, testing interconnects to determine whether they have acceptable electrical properties involves either measuring the cross-sectional area of the interconnects to derive their properties or directly measuring the properties by means of dedicated test equipment having many tiny test probes. Either way, testing interconnects has necessarily involved removing ICs from the production line to a test station or facility. This not only requires the test station or facility to be purchased and maintained, but complexity and delays are also introduced into the fabrication process, all of which increases cost. Testing ICs having multiple interconnect layers involves multiple trips to the test station or facility and is therefore particularly costly.
Accordingly, what is needed in the art is a better way to test the electrical properties of interconnects in an IC. More specifically, what is needed in the art is a way to test the electrical properties of interconnects without having to remove the IC from the production line. Still more specifically, what is needed in the art is a way to test the electrical properties of interconnects without having to measure their cross-section or the electrical properties themselves. Yet more specifically, what is needed in the art is an in-line test circuit that fits within a relatively small amount of area on an IC, allowing it to be replicated and placed at several locations within the IC without significantly increasing IC cost.